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GPLAB-1000U/1000P/ADB
For Pricing or Questions Please Call us at 248.477.C4AV (2428)

The Advanced Evaluation Suites for CMOS-Image-Sensors --GPirates

The GPirates are offered by Graphin, evaluation suites for CMOS-Image-Sensors (hereinafter called CIS) to mobile device products.

The open standards for Mobile CIS products such as the Parallel Interfaces, SMIA, and MIPI are fully supported.The GPirates are available today in two Parallel/SMIA hardware boards, the GPLAB-1000U supporting USB2.0 and the GPLAB-1000P supporting PCIe with high speed interfaces, in addition to application software supporting CIS control and image evaluation called the PixelLAB. Optionally the Advanced Board can help to have better access to advanced evaluation products of CMOS-Image-Sensors with the MIPI standard.

Features of the GPLAB-1000U/1000P

Parallel 16bit(OP32bit)/SMIA(CCP2) 1ch supported
on board Programmable Power Supply for camera-heads
Universal Interface such as USB2.0 supported by the 1000U
High Speed Interface such as PCIe x 1 supported by the 1000P
optionally connectors available for on board 32 I/O
Raw to RGB conversion available inside FPGA

Features of the Advanced Board

the GPLAB-1000U/1000P/GPLAB-1000F needed
MIPI(CSI-2) : compliance 2Lanes 750Mbps
SMIA(CCP2) : compliance 2ch 680Mbps
on board Skew Adjustment function available for each lane
on board Image-Capture-Mode
on board Packet-Capture-Mode
Testing Probe available for oscilloscopes from Agilent Technologies Inc.
optionally MIPI 4Lanes supported

Specifications for GPLAB-1000 series

Product Name USB Capture System High Speed Capture System
Model Name GPLAB-1000U GPLAB-1000P*1
Cable for PC interface USB Cable CAT7LAN Cable
PC Transmission Mode real-time transfer up to capability of USB2.0 real-time transfer with PCIe x 1
Internal Buffer Memory 32MB SDRAM not available(DMA transfer to PC memory)
Connectors for camera interface
Connectors 20pins x 2columns,2.54mm pitch
Parallel Interface Supported
Parallel 8bit, 16bit (CLK Max96MHz)*3
Serial Interface Supported
SMIA 1.0 compliance(SMIA832 on board)
Configuration for camera registers
I2C bus:R/W is possible from a host PC
Functionalities with FPGA on board

- YUV422RGB565 conversion function(CSC : Color Space Converter)
- RAWRGB565 conversion function(B2R:Bayer to RGB)
- frame skipping capturing function,pixel & line skipping capturing function
- ROI(clipping)function,frame-rate-automatic recognition for image resolution

Power Supply for Cameras

- V1:DIP SW or Software setup: +1.25V/1.5V/1.6V/1.8V(max 400mA) *3
- V2:DIP SW or Software setup: +2.5V/2.8V/3.3V (max 400mA) *3
- AUX:+5.0V

Extended Connectors

- Input : 16bit
- Output : 16bit
- Signal Level : 3.3V
- Connectors : 25 pins x column,2.54mm pitch

Users' Oscillator
Sockets for user clock:4 pins IC socket (+3.3V)
Configurable Clock Mode
Configuration with DIP switch:user clock frequency is switchable
Status display Detection Display for Synchronous signals and Clock signals : LED x 8pcs Detection Display for Synchronous signals and Clock signals:LED x 6pcs
Input Connectors for Power Supply
DC+5.0V input : 2pins, 2.50mm pitch (can use with a USB power supplied)
Output Connectors for External Power Supply
2pins, 2.00mm pitch
Connectors for Power Controls
Optionally available : 20 pins x 1column, 2.54mm pitch
Dimensions
100.0mm x 65.0mm
100.0mm x 87.0mm

Specifications for interface-boards of GPLAB-1000P

Product Name PCIe Interface Board ExpressCard/34 Interface Board
Model Name GPLAB-PCIF GPLAB-NTIF
PC interface PCIe x1(Transfer Rate : up to 200MB/sec)*2 ExpressCard/34(Transfer Rate : up to 160MB/sec)*2
Dimensions 50.0mm x 70.0mm 103.0mm x 34.0mm

*1 GPLAB-1000P cannot work alone. This works in combination with either GPLAB-PCIF or GPLAB-NTIF.
*2 Please note that values described in transfer rate vary with a performance of a PC used.
*3 Options can support 24-32bit.

Specifications for the Advanced Board

Product Name PCIe Interface Board
Model Name GPLAB-ADB
PHY supported for ?lIPI MIPI D-PHY 2Lanes on board
PHY supported for SMIA on board PHY 2ch supported for SMIA(CCP2)
Connectors for camera-Skull Using PCI Express x 4 edge connectors
Power Supply : +5V, V1, V2,GND
Sensor Signals(High Speed Differential) : DIFFCK[1:0], DIFFD[1:0]
Sensor Control Signals(LVTTL) : SCL,SDA, RESETn, EXTCLK
Universal input and output(LVTTL) : GPIN[3:0], GPOUT[3:0]
Backup(LVPECL) : DIFFD[7:0] *4
Functionalities with FPGA on board on board IP supported for MIPI(CSI-2)
on board IP supported for SMIA(CCP2)
Supported Speed at 750Mbps per 1 Lane
Mode : Data Capture / Packet Capture
The number of supported MIPI Lane : up to 4Lanes (this will be available with 4Lane Skull)
Connectors for debugging Connectors : 50 pins x 2 columns, 2.54mm
Contacts for measurement MIPI D-PHY Acquisition Probe for testers from Agilent Technologies Inc.
etc. Lane Skew adjustment is possible (1Step 78psec)
Dip-Switch Reserved for future use
Status Display Detection Display for Synchronous signals and Clock signals : LED x 8 pcs
Input Connectors for Power Supply DC jack or 2(two) pins connector
Dimensions 85mm x 65mm

*4 Options support LVDS and user specified cameras.

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